The upgraded CodeFusion Studio 2.0 simplifies how developers design, test and deploy AI on embedded systems.
Updated
January 8, 2026 6:34 PM
Illustration of CodeFusion Studio™ 2.0 showing AI, code and chip icons. PHOTO: ANALOG DEVICES, INC.
Analog Devices (ADI), a global semiconductor company, launched CodeFusion Studio™ 2.0 on November 3, 2025. The new version of its open-source development platform is designed to make it easier and faster for developers to build AI-powered embedded systems that run on ADI’s processors and microcontrollers.
“The next era of embedded intelligence requires removing friction from AI development”, said Rob Oshana, Senior Vice President of the Software and Digital Platforms group at ADI. “CodeFusion Studio 2.0 transforms the developer experience by unifying fragmented AI workflows into a seamless process, empowering developers to leverage the full potential of ADI's cutting-edge products with ease so they can focus on innovating and accelerating time to market”.
The upgraded platform introduces new tools for hardware abstraction, AI integration and automation. These help developers move more easily from early design to deployment.
CodeFusion Studio 2.0 enables complete AI workflows, allowing teams to use their own models and deploy them on everything from low-power edge devices to advanced digital signal processors (DSPs).
Built on Microsoft Visual Studio Code, the new CodeFusion Studio offers built-in checks for model compatibility, along with performance testing and optimization tools that help reduce development time. Building on these capabilities, a new modular framework based on Zephyr OS lets developers test and monitor how AI and machine learning models perform in real time. This gives clearer insight into how each part of a model behaves during operation and helps fine-tune performance across different hardware setups.
Additionally, the CodeFusion Studio System Planner has also been redesigned to handle more device types and complex, multi-core applications. With new built-in diagnostic and debugging features — like integrated memory analysis and visual error tracking — developers can now troubleshoot problems faster and keep their systems running more efficiently.
This launch marks a deeper pivot for ADI. Long known for high-precision analog chips and converters, the company is expanding its edge-AI and software capabilities to enable what it calls Physical Intelligence — systems that can perceive, reason, and act locally.
“Companies that deliver physically aware AI solutions are poised to transform industries and create new, industry-leading opportunities. That's why we're creating an ecosystem that enables developers to optimize, deploy and evaluate AI models seamlessly on ADI hardware, even without physical access to a board”, said Paul Golding, Vice President of Edge AI and Robotics at ADI. “CodeFusion Studio 2.0 is just one step we're taking to deliver Physical Intelligence to our customers, ultimately enabling them to create systems that perceive, reason and act locally, all within the constraints of real-world physics”.
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AI growth is increasingly becoming a manufacturing, packaging and deployment challenge — not just a computing one.
Updated
May 26, 2026 5:28 PM
Taipei 101 and Taipei Nan Shan Plaza, viewed from Elephant Mountain. PHOTO: UNSPLASH
As AI companies continue scaling larger models and data centers, the pressure is no longer falling only on chip design. Manufacturing capacity, advanced packaging and infrastructure deployment are becoming equally important parts of the AI race. AMD’s latest investment announcement reflects how quickly that shift is accelerating.
The US chipmaker announced plans to invest more than US$10 billion across Taiwan’s semiconductor and manufacturing ecosystem to support next-generation AI infrastructure. The investment focuses on expanding partnerships and increasing advanced packaging capacity needed for future AI systems.
The announcement highlights a growing reality across the AI industry. Building powerful AI chips is no longer enough on its own. Companies now also need the manufacturing networks, packaging technologies and supply chain coordination required to deploy AI infrastructure at global scale.
AMD’s investments center heavily around advanced chip packaging, an area becoming increasingly critical as AI systems demand higher performance and greater power efficiency. Traditional chip architectures are struggling to keep pace with the size and complexity of modern AI workloads. Advanced packaging helps connect processors, memory and computing systems more efficiently while managing power and cooling limitations inside large-scale AI environments.
The company said it is working with Taiwan-based partners including ASE, SPIL and PTI to develop next-generation packaging technologies for its upcoming 6th Gen AMD EPYC processors, codenamed “Venice.” AMD also said it had qualified what it described as the industry’s first 2.5D panel-based EFB interconnect technology alongside PTI.
At the center of the broader strategy is AMD Helios, the company’s rack-scale AI infrastructure platform scheduled for deployment beginning in the second half of 2026. The platform combines AMD Instinct MI450X GPUs, 6th Gen EPYC CPUs, networking systems and AMD’s ROCm software stack into integrated AI infrastructure systems designed for hyperscale deployment.
Rather than selling individual processors alone, companies are increasingly building complete AI infrastructure platforms that combine hardware, software, cooling systems and power management into unified deployments. That transition is reshaping how AI infrastructure is designed, manufactured and delivered.
Taiwan is also becoming more deeply embedded in that process. AMD’s investment spans not only semiconductor packaging companies but also manufacturing and system integration partners including Sanmina, Wiwynn, Wistron and Inventec. The partnerships reflect Taiwan’s growing role as one of the operational centers of the global AI infrastructure economy.
Dr. Lisa Su, Chair and CEO of AMD, said: “As AI adoption accelerates, our global customers are rapidly scaling AI infrastructure to meet growing compute demand. By combining AMD leadership in high-performance computing with the Taiwan ecosystem and our strategic global partners, we are enabling integrated, rack-scale AI infrastructure that helps customers accelerate deployment of next-generation AI systems”.
Power efficiency is becoming another major challenge shaping AI infrastructure decisions. As AI workloads consume more electricity and generate more heat, infrastructure providers are increasingly being forced to rethink cooling systems, interconnect technologies and deployment economics.
AMD’s announcement signals how the AI competition is evolving beyond model development and raw computing power. The next stage may depend just as heavily on who can manufacture, package and deploy AI infrastructure fast enough to support global demand.